Free Shipping Across India | Pay Cash On Delivery | Call: 08030860796 (Mon - Sat)

search lense
Call Us : 08030860796
Let us call you

syllabus of pune university (information technology)engineering 2nd year

Structure of S.E. (Information Technology) 2008 Course
Proposed in year 2009 - 10
Part - I
Subject
Code
No.
Subject
Teaching
Scheme
Hours / Week
Examination Scheme Total
Marks
Lect. Pract. Paper T/W Pract. Oral Total
210241 Discrete Structures 4 ---- 100 --- --- --- 100
214442 Computer Organization 3 ---- 100 --- --- --- 100
210243 Digital Electronics and Logic Design 4 ---- 100 --- --- --- 100
214441 Fundamental of Data structures 4 ---- 100 --- --- --- 100
207005 Humanities and Social Sciences 3 ---- 100 --- --- --- 100
214443 Digital Laboratory ---- 4 ---- 50 50 ---- 100
214444 Programming Laboratory --- 4 --- 50 50 --- 100
214445 Communication and Language Lab. --1- 2 --- 50 ---- --- 50
Total 19 10 500 150 100 --- 750
Total of Part I (A) 29 Hrs 750
Part- II
Subject
Code
No.
Subject
Teaching
Scheme
Hours / Week
Examination Scheme
Total
Marks
Lect. Pract. Paper T/W Pract. Oral Total
207003 Engineering Mathematics - III 4 --- 100 --- --- --- 100
214446 Computer Graphics 3 --- 100 --- --- --- 100
214447 Processor Architecture & Interfacing 3 --- 100 --- --- --- 100
214448 Data Structures and Files 3 --- 100 --- --- --- 100
214449 Data Communication 3 --- 100 --- --- --- 100
214450 Processor Interfacing Laboratory --- 4 --- 25 --- 50 75
214451 Data Structures and Files Laboratory --- 4 --- 25 50 --- 75
214452
Object Oriented Programming and
Computer Graphics Laboratory
1 4 --- 50 50 --- 100
Total 17 12 500 100 100 50 750
Total of Part II (B) 29 Hrs 750
Grand Total
(A) + (B) 1500
2
Semester - I
Information Technology
2008 Course
3
210241: DISCRETE STRUCTURES
Teaching Scheme Examination Scheme
Lectures: 4 Hrs/week Theory: 100 Marks
Discrete mathematics- the mathematics of integers and of collections of object - underlies the
operation of digital computer, and is used widely in all fields of computer science for reasoning
about data structures algorithms and complexity. The primary objective of subject is to prepare
students mathematically for the study of computer engineering. Topics covered in the course
include proof techniques, logic and sets, functions, relations, counting techniques, probability and
recurrences. By the end of the course, students should be able to formulate problems precisely,
solve the problems, apply formal proof techniques, and explain their reasoning clearly.
Prerequisite: Basic Mathematics
Learning objectives: … the student will be able to
· Use appropriate set, function, or relation models to analyze practical examples, interpret the
associated operations and terminology in context.
· Determine number of logical possibilities and probability of events
· Learn logic and proof techniques to expand mathematical maturity
· Formulate problems precisely, solve the problems, apply formal proof techniques, and
explain their reasoning clearly.
Unit I : (8 Hrs)
Sets and Propositions
Sets, Combination of sets, Finite and Infinite sets, Un-countably infinite sets, Principle of inclusion
and exclusion, multisets.
Propositions, Conditional Propositions, Logical Connectivity, Propositional calculus, Universal
and Existential Quantifiers, Normal forms, methods of proofs, Mathematical Induction
Unit II : (8 Hrs)
Groups and Rings
Algebraic Systems, Groups, Semi Groups, Monoid, Subgroups, Permutation Groups, Codes and Group
codes, Isomorphism and Automorphisms, Homomorphism and Normal Subgroups, Ring, Integral Domain,
Field, Ring Homomorphism, Polynomial Rings and Cyclic Codes
Unit III : (10 Hrs)
Relations and Functions
Properties of Binary Relations, Closure of relations, Warshall's algorithm, Equivalence Relations and
partitions, Partial ordering relations and lattices, Chains and Anti chains.
Functions, Composition of functions, Invertible functions, Pigeonhole Principle, Discrete Numeric
functions and Generating functions, Job scheduling Problem.
Recurrence Relations
Recurrence Relation, Linear Recurrence Relations With constant Coefficients, Homogeneous Solutions,
Total solutions, solutions by the method of generating functions
4
Unit IV : (8 Hrs)
Graphs
Basic terminology, multi graphs and weighted graphs, paths and circuits, shortest path in weighted graph,
Hamiltonian and Euler paths and circuits, factors of a graph, planer graph and Travelling salesman problem.
Unit V : (8 Hrs)
Trees
Trees, rooted trees, path length in rooted trees, prefix codes, binary search trees, spanning trees and cut set,
minimal spanning trees, Kruskal's and Prim's algorithms for minimal spanning tree, The Max flow -Min
cut theorem (transport network).
Unit VI : (8 Hrs)
Permutations, Combinations and Discrete Probability
Permutations and Combinations: rule of sum and product, Permutations, Combinations, Algorithms for
generation of Permutations and Combinations. Discrete Probability, Conditional Probability, Bayes'
Theorem, Information and Mutual Information
Text Books:
1. C. L. Liu and D. P. Mohapatra, "Elements of Discrete Mathematics", SiE Edition, TataMcGraw-Hill,
2008, ISBN 10:0-07-066913-9
2. R. Johnsonbaugh, "Discrete Mathematics", 5th Edition, Pearson Education, 2001 ISBN 81 - 7808 - 279 - 9
(Recommended for Unit I and Unit II)
Reference Books:
1. N. Biggs, "Discrete Mathematics", 3rd Edition, Oxford University Press, ISBN 0 -19 - 850717 - 8
2. Kenneth H. Rosen, "Discrete Mathematics and its Applications", 6th edition, McGraw-Hill, 2007.
ISBN 978-0-07-288008-3
3. E. Goodaire and M. Parmenter, "Discrete Mathematics with Graph Theory", 2nd edition, Pearson
Education, 2003 ISBN 81 - 7808 - 827 - 4
4. Semyour Lipschutz & Marc Lipson, " Discrete Mathematics", McGraw-Hill, 3rd Special Indian
Edition, ISBN-13 : 978-0-07-060174-1
5. B. Kolman, R. Busby and S. Ross, "Discrete Mathematical Structures", 4th Edition, Pearson Education,
2002, ISBN 81-7808-556-9
N. Deo, "Graph Theory with application to Engineering and Computer Science", Prentice Hall of India,
1990, 0 - 87692 - 145 - 4
5
214442 - COMPUTER ORGANIZATION
Teaching Scheme Examination scheme
Lectures: 3 hrs / week Theory: 100 Marks
Learning Objectives
1. To understand the structure, function and characteristics of computer systems
2. To understand the design of the various functional units of digital computers
3. To learn basics of Parallel Computer Architecture.
Unit I : (8 Hrs)
Computer Evolution & Arithmetic
A Brief History of computers, Designing for Performance, Von Neumann Architecture, Hardware
architecture, Computer Components, Interconnection Structures, Bus Interconnection, Scalar Data
Types, Fixed and Floating point numbers, Signed numbers, Integer Arithmetic, 2's Complement
method for multiplication, Booths Algorithm, Hardware Implementation, Division, Restoring and
Non Restoring algorithms, Floating point representations, IEEE standards, Floating point
arithmetic
Unit II : (8 Hrs)
The Central Processing Unit
Machine Instruction characteristics, types of operands, types of operations, Addressing
modes, Instruction formats, Instruction types, Processor organization, Intel 8086 as example,
Programmers model of 8086, max/min mode, Register Organization, Instruction cycles, Read
Write cycles, 8086 assembly instruction examples to explain addressing modes
Unit III : (6 Hrs)
The Control Unit
Single Bus Organization, Control Unit Operations: Instruction sequencing, Micro
operations and Register Transfer. Hardwired Control: Design methods - State table and classical
method, Design Examples - Multiplier CU. Micro-programmed Control: Basic concepts,
Microinstructions and micro- program sequencing
Unit IV : (6 Hrs)
Memory Organization
Characteristics of memory systems, Internal and External Memory, Types of memories:
ROM: PROM, EPROM, EEPROM, RAM: SRAM, DRAM, SDRAM, RDRAM
High-Speed Memories: Cache Memory, Organization and Mapping Techniques, Replacement
Algorithms, Cache Coherence, MESI protocol. Virtual Memory: Main Memory allocation,
Segmentation, Paging, Address Translation Virtual to Physical.
Secondary Storage: Magnetic Disk, Tape, DAT, RAID, Optical memory, CDROM, DVD
Unit V : (6 Hrs)
I/O Organization
Input/Output Systems, Programmed I/O, Interrupt Driven I/O,8086 Interrupt structure,
Direct Memory Access (DMA),8237 features Buses and standard Interfaces: Synchronous,
Asynchronous, Parallel I/O 8255 features, Serial I/O 8251 features, PCI, SCSI, USB Ports
Working mechanisms of Peripherals: Keyboard, Mouse, Scanners, Video Displays, Touch Screen
panel, Dot Matrix, Desk-jet and Laser Printers.(features and principles)
6
Unit VI : (8 Hrs)
Parallel Organization
Instruction level pipelining and Superscalar Processors, Multiple Processor Organizations,
Closely and Loosely coupled multiprocessors systems, Symmetric Multiprocessors, Clusters,
UMA NUMA, Vector Computations,
RISC: Instruction execution characteristics,, RISC architecture and pipelining. RISC Vs
CISC
Text Books
1. W. Stallings, "Computer Organization and Architecture: Designing for performance", 67h
Edition, Prentice Hall of India, 2003, ISBN 81 - 203 - 2962 - 7
2. C. Hamacher, V. Zvonko, S. Zaky, "Computer Organization", McGraw Hill, 2002, 5th
edition ISBN 007-120411-3
Reference Books
1. J. Hays, "Computer Architecture and Organization", 2nd Edition, McGraw-Hill, 1988 ISBN
0 - 07 - 100479 - 3
2. W. Stallings William, "Computer Organization and Architecture: Principles of Structure
and Function", 2nd Ed, Maxwell Macmillan Editions, 1990 ISBN 0 - 02 - 946297 - 5
(Chapter: 2,3,4,5,7,8,9,10,11,12,13,14).
A. Tanenbaum, "Structured Computer Organization", 4th Ed, Prentice Hall of India, 1991
ISBN 81 - 203 - 1553 - 7 (Chapter: 1,4,5,6,8).
3. G. George, "Computer Organization: Hardware and Software", 2nd Edition, Prentice Hall of
India, 1986 (Chapter: 3,4,5).
4. D. Paterson, J. Hennesy, "Computer Organization and Design: The Hardware Software
Interface", 2nd Edition, Morgan Kauffman, 2000 ISB
7
210243 - DIGITAL ELECTRONICS AND LOGIC DESIGN
Teaching Scheme Examination scheme
Lectures: 4 hrs / week Theory : 100 Marks
Prerequisites : Basic Electronics Engineering
Learning Objectives
1. To learn and understand basic digital design techniques.
2. To learn and understand design and construction of combinational and sequential
circuits.
3. To introduce basic components of microprocessors.
Unit I : (8 Hrs)
Number System& Logic Design Minimization Techniques
Introduction. Binary, Hexadecimal numbers, Octal numbers and number conversion.
Signed Binary number representation. Signed Magnitude, 1's complement and 2's complement
representation. Binary, Hexadecimal Arithmetic. 2's complement arithmetic.
Algebra for logic circuits : Logic variables;
Logic function : NOT, AND, NOR, XOR, OR, XNOR, NAND
Codes : BCD, Excess-3, Gray code , Binary Code and their conversion
Boolean algebra. Truth tables and Boolean algebra. Idealized logic gates and symbols. DeMorgan's
rules Axiomatic definition of Boolean algebra, Basic theorems and properties of Boolean algebra
Unit II : (6 Hrs)
Logic Families
TTL: Standard TTL characteristics- Speed, power dissipation, fan-in, fan-out, current and
voltage parameters, noise margin, operating temperature etc. Operation of TTL NAND gate. TTL
Configurations- Active pull-up, Wired AND, totem pole, open collector.
CMOS: CMOS Inverter, CMOS characteristics, CMOS configurations- Wired Logic, Open drain
outputs.
Interfacing: TTL to CMOS and CMOS to TTL
Unit III : (8 Hrs)
Combinational Logic
Logic minimization Representation of truth-table, SOP form, POS form, Simplification of
logical functions, Minimization of SOP and POS forms, Don't care conditions.
Reduction techniques: K-Maps (only up to 4 variables) & Quine - McClusky technique
Arithmetic Operations: - Binary Addition, Subtraction, BCD Addition
Circuits: - Half- Adder, Full Adder, Half Subtract or, Full Sub tractor, BCD adder using and
subtract using 7483, look ahead and carry, parity generator and checker using 74180, magnitude
comparator using 7485.
Multiplexers (MUX) : Working of MUX, Implementation of expression using MUX
(ICD74153, Demultiplexers 74151).
Demultiplexers (DEMUX):- Implementation of expression using DEMUX, Decoder. (IC 74138).
8
Unit IV : (8 Hrs)
Sequential Logic
Introduction: Sequential Circuits. Difference between combinational circuits and sequential
circuits
Flip- flop : SR, JK, D, T; Preset & Clear, Master and
Slave Flip Flops their truth tables and excitation tables, Conversion from one type to another type
of Flip Flop. Study of7473,7474,7476
Application of Flip-flops. Bounce Elimination Switch, registers, counters.
Registers : Buffer register; shift register;7495
Counters : Asynchronous counter. Synchronous counter, ring counters, BCD Counter, Johnson
Counter,
Modulus n counter(IC 7490, 74191), Pseudo Random Binary Sequence Generator, Sequence
generator and detector.
Unit V : (8 Hrs)
ASM & Programmable Logic Devices
Algorithmic State Machines,ASM charts, notations, design of simple controller,
multiplexer controller method
Examples. Sequence Generator, Types of Counter
Programmable Logic Devices
PLD: PLA- Input, Output Buffers, AND, OR, Invert/ Non-Invert Matrix.
Design Example- Any 4 Variables SOP function using PLDs
Study of basic architecture of FPGA CPLD
Unit VI : (6 Hrs)
VHDL and Introduction to Microprocessors
Introduction to HDL, VHDL- Library, Entity, Architecture, Modeling Styles, Concurrent
and Sequential Statements, Data Objects & Data Types, Attributes
Design Examples. VHDL for Combinational Circuits-Adder, MUX.
VHDL for Sequential Circuits-Synchronous and Asynchronous Counter. ,Shift Register
Introduction to Microprocessor. Introduction of Ideal Microprocessor, Data Bus, Address Bus,
Control Bus, 8085 Programmers model as an example.
Text Books
1. James Bignell, Robert Donavan "Digital Electronics" 5th edition CENEGAGE Learning
ISBN
2. TB 1. R. Jain, "Modern Digital Electronics", 3rd Edition, Tata McGraw-Hill, 2003, ISBN 0
- 07 - 049492 - 4
3. TB 2. Stephen Brown, Zvonko Vranesic " Fundamentals of Digital Logic with VHDL
Design" Mcgraw-Hill
Reference Books
1. John Yarbrough, "Digital Logic applications and Design" Thomson
2. Flyod "Digital Principles", Pearson Education
3. Malvino, D.Leach " Digital Principles and Applications", 5th edition, Tat Mc-Graw Hill
4. J.Bhaskar "VHDL Primer" 3rd Edition, Pearson Edition
9
214441 - FUNDAMENTAL OF DATA STRUCTURE
Teaching Scheme Examination scheme
Lectures: 4 hrs / week Theory: 100 Marks
Prerequisite : Fundamental knowledge of 'C' from 'Fundamentals of Programming Language.
Learning Objectives
The students shall learn the C language and pointers in depth. They will be able to able use
pointers for data manipulation. They will learn linear data structures.
Unit I : (8 Hrs)
Introduction to C
Constants, variables and keywords in C, operators and control structure in c(decision, loop
and case), functions, macros, arrays and string manipulation, structure, union, enumeration, bitwise
operations
Unit II : (8 Hrs)
Arreys & Pointers in C
Functions: Parameter passing call by value and call by reference, scope rules, functions and
pointers, function returning pointer and pointer to function, String manipulations using
arrays,pointer to pointer.
Structure and Union: Passing and returning structure as parameter for function ,structure and
pointer.
Recursion: Definition, writing recursive functions & how recursion works. File handling using C.
Unit III : (8 Hrs)
Introduction to Data structures & Analysis of Algorithams
Introduction to Data Structures: Concept of data, Data object, Data structure, Abstract Data Types
(ADT), realization of ADT in 'C'.
Concept of Primitive and non primitive, linear and Non-linear, static and dynamic ,persistent and
ephemeral data structures.
Analysis of algorithm: frequency count and its importance in analysis of an algorithm, Time
complexity & Space complexity of an algorithm, Big 'O', 'W' and 'q' notations, Best, Worst and
Average case analysis of an algorithm.
Unit IV : (8 Hrs)
Searching and sorting techniques
Need of searching and sorting, why various methods of searching and sorting, Sorting
methods:Linear and binary search.
Sorting methods : Bubble, insertion, selection, merge, quick, bucket,
Time complexity of each searching and sorting algorithm
10
Unit IV : (8 Hrs)
Linear data structures using sequential organization
Concept of sequential organization, Concept of Linear data structures, Concept of ordered
list, Storage representations of ordered list such as row major , column major and their address
calculation.
Representation of sparse matrix using arrays, application of array in polynomial
representation and .algorithm for sparse matrix addition, multiplication, simple and fast transpose
Unit VI : (6 Hrs)
Linear data structures using linked organization
Concept of linked organization, singly linked list, doubly linked list, circular linked list.
Linked list as ADT. Representation and manipulations of polynomials using linked lists,
comparison of sequential linked organization with linked organization, concept Generalized
Linked List.
Text Books R.
1. R. Gilberg, B. Forouzan, "Data Structures: A pseudo code approach with C", Cenage Learning,
ISBN 9788131503140.
2. E. Horowitz , S.Sahani, S.Anderson-Freed ""Fundamentals of Data Structures in C",
Universities Press ,2008 ,ISBN 10:8173716056
3. Let us C & Pointer in C, Yashwant Kanitkar,,BPB Publication
References Books
1. The C Programming Language, Kernighan and Ritchie, Prentice Hall
2. "An introduction to data structures with applications", Tremblay and Sorenson Tata
McGrawHill, Second Edition
11
207005 - HUMANITIES AND SOCIAL SCIENCES
Teaching Scheme Examination scheme
Lectures: 3 hrs / week Theory: 100 Marks
Learning Objectives
This course will lead to the learning of
1. Human and social development.
2. Contemporary national and international affairs.
3. Emergence of Indian society and Economics.
4. Sectoral development and Economic development and related issues (such as international
economics, WTO, RBI, etc).
Unit II : (6 Hrs)
Indian Society
Structure of Indian Society, Indian Social Demography- Social and Cultural,
Differentiations: caste, class, gender and tribe; Institutions of marriage, family and kinship-
Secularization -Social Movements and Regionalism- Panchayatraj Institutions; Affirmative Action
Programme of the Government-various reservations and commissions.
Unit II : (6 Hrs)
Social Development
Scientific approach to the study of human beings. Evolution of human kind, social change
and evolution. Industrial revolution. National policy on education, health and health care and
human development.
Unit III : (6 Hrs)
Sectoral Development
Agriculture : Technology changes, Green revolutions, Employment Rural and Urban,
Government Schemes.
Industrial Development : Strategies, Public and Private Sectors, Categories, infrastructure,
transport and communication, Consumer Awareness.
Unit IV : (6 Hrs)
Environment and Ecology
Ecosystems : Structure, Working, components.
Pollution : Water and Air Pollution, Global Warming, Control Strategies, International Treaties.
Energy Sources : Renewable and Non Renewable, Hydro power, Biomass, Ocean, Geothermal and
Tidal .
Global Environmental Issues : Population Growth, Soil Degradation, Loss of Biodiversity.
Unit V : (6 Hrs)
Economic Development
Need for planned economic development - Law of demand and supply. Planning objective,
five years plan, priorities and problems. Population and development.
Indian Economics - basic features, natural recourses population size and composition, national
income concepts, micro economics of India, inflation.
12
Unit VI : (6 Hrs)
Banking and Trades
Financial Analysis, Ratios, Cost Analysis, financial Institutions, Finance Commissions,
Budget Analysis.
Indian Banking, Role of Reserve bank of India
International Economy, WTO, International aid for economic growth.
Outcome
Making engineering and technology students aware of the various issues concerning man and
society. These issues will help to sensitize students to be broader towards the social, cultural,
economic and human issues, involved in social changes.
Methodologies
1. Suitable case studies should be discussed
2. Student group discussion activity.
3. Social Networking activity.
Reference Books
1. Krugman, International Economics, Pearson Education.
2. Prakash, The Indian Economy, Pearson Education.
3. Thursen Gerald, Engineering Economics, Prentice Hall.
4. C.S. Rao, Environmental Pollution Control Engineering, New Age International Pvt. Ltd.
5. Rangarajan, Environmental Issues in India, Pearson Education.
6. University of Delhi, The Individual & Society, Pearson Education.
7. Wikipedia.org / wiki /social studies.
8. M. N. Srinivas, Social change in modern India, 1991, Orient Longman.
9. David Mandelbaum, Society in India, 1990, Popular.
13
214443 - DIGITAL LABORATORY
Teaching Scheme Examination scheme
Practical: 4 hrs / week Practical: 50 Marks
Term Work: 50 Marks
A. Combinational logic design
1. TTL Characteristics (study and write-up only)
2. Design ( truth table, K map ) and implement 4 bit Code converter.
i. Binary to gray and vice versa
ii. BCD to Excess-3 and vice versa
3. Design ( truth table, K map ) and implement 4 bit BCD Adder / Subtractor using IC 7483.
4. Realization of Boolean expression using multiplexer IC 74151/74153.
5. Design ( truth table, K map ) and implement Parity generator / detector using EX-OR gates
and IC 74180.
B. Sequential circuit design
1. Design & Implement of SR ,JK flip-flop using discrete gates and T, D flip-flop using
Master Slave J-K flip-flop IC 7476.
2. Design (State diagram) and implement 4 bit Up, Down, Controlled Up/Down Ripple
counter using master slave JK flip-flop IC 7476.
3. Design (State diagram, state table, K map ) and implement 4 bit Up, Down, Controlled
Up/Down Synchronous counter using master slave JK flip-flop IC 7476.
4. Design and implement Modulo 'n' counter with IC 7490 and IC 74191.
5. Design (State diagram, state table, K map, Bush table & Bush diagram) and implement
Sequence Generator (with & without bushing) using master slave JK flip-flop IC 7476.
6. Design (State diagram, State table, K map) and implement Sequence Detector using master
slave JK flip-flop IC 7476.
C. VHDL Programming
Simulation of
1. 4:1 multiplexer using data flow modeling.
2. Full adder with Half adder using structural modeling.
3. D Flip-Flop using behavioral modeling.
4. 3 bit bidirectional shift register.
D. ASM, PALS and FPGA
1. Simple ASM using multiplexer controller method.
2. Implementation of combinational logic using PLAs
3. Study of FPGA devices (Study and Write up only).
- Instructor will frame assignments based on the suggested assignments as given above. Students
will submit the term work in the form of journal consisting of minimum of 16 assignments of
which assignment of Group C and 2 assignments from Group D are compulsory .
- Practical examination will be based on the term work and questions will be asked to judge the
understanding of assignments performed at the time of examination
Note : Concern staff member should take care that the Students verify the functionality
of the ICs being used.
14
214444 - PROGRAMMING LABORATORY
Teaching Scheme Examination scheme
Practical: 4 hrs / week Practical: 50 Marks
Term work: 50 Marks
This laboratory includes the assignments based on Fundamentals of Data Structures using features
of C Language.
List of experiments:
1. Implement set operations using arrays and perform union, intersection, difference,
symmetric difference.
2. Implement following Matrix operations:
a. addition with pointers to arrays,
b. multiplication without pointers to arrays,
c. transpose with pointers to arrays,
d. saddle point without pointers to arrays
3. Perform following String operations with and without pointers to arrays (without using the
library functions) : a. substring, b. palindrome, c. compare, d. copy, e. reverse.
4. Structure manipulation (for any database like Employee or Bank database) with and
without pointers to structures.
5. Accept student information (e.g. RollNo, Name, Percentage etc.).
a. Display the data in descending order of Percentage (Bubble Sort)
b. Display data for RollNo specified by user (Linear Search)
c. Display the number of passes and comparisons for different test cases (Worst,
Average, Best case).\
6. Accept Mobile user information (e.g. MobileNo, Name, BillAmount etc.).
a. Display the data in descending order of MobileNo. (insertion Sort)
b. Display the data in ascending order of Name (Selection Sort)
c. Display details for Mobileno specified by user (Binary Search)
d. Display the number of passes and comparisons for different test cases (Worst,
Average, Best case).
7. Implement Quick Sort recursively of the following set of numbers such as 56, - 90, 80, 78,
234, 654, 432, 12, 0, -11.
8. Implement Sparse matrix and perform following operations on it: Addition, Simple
Transpose and Fast Transpose.
9. Create a singly linked list with options:
a. insert (at front, at end, in the middle),
b. delete (at front, at end, in the middle),
c. Display,
d. Display Reverse,
e. Revert the SLL
10. Accept input as a string and construct a Doubly Linked List for the input string with each
node contains, as a data one character from the string and perform:
a) Insert b) delete, c) Display forward, d) Display backward.
15
Reference:
Code complete: STEVE McCONNEL
Note : While performing the assignments following care should be taken
1. Proper indenting, coding styles, commenting, naming conventions should be
followed.
2. Avoid using global variables as far as possible
3. Use of functions is necessary
4. All Assignments to be implemented using C and Time and Space Complexity is to
be verified with theoretical findings.
5. Faculty should prepare a lab manual including standard test cases & should be
available for reference to students.
Student should submit term work in the form of a journal based on the above assignments.
Practical examination will be based on the term work. Questions will be asked during the
examination to judge the understanding of the practical performed at the time of examination.
Candidate is expected to know the theory involved in the experiment.
16
214445 COMMUNICATIONS AND LANGUAGE LABORATORY
Teaching Scheme Examination scheme
Lectures: 1hr/week.
Practical: 2 hrs / week Term work: 50 Marks
Learning Objectives
· Provide a sound grammatical and functional framework and systematic practice of key
language
· Present language in relevant and realistic situations
· Develop an essential Business English vocabulary
· Integrate pronunciation practice with the main language points
· Build confidence by developing tactics to help learners control conversations and avoid
communication breakdowns
· Motivate learners with activities to check their progress
· Encourage learners to talk about their own jobs and experiences
· Raise awareness of the cultural aspects of business communication
Overview
This course is designed for students with a limited knowledge of English who now want to
communicate simply and confidently in a range of job-related situations. It maximizes study time
by focusing on essential language and skills and developing effective learning strategies. Students
learn listening, speaking, reading and writing skills with exposure to Business English. It will
allow systematic coverage of Grammar & Vocabulary through natural recycling of language. The
course will enable students to speak and write simple English in a range of everyday situations as
well as communicate effectively in business environment. It will also focus on remedial teaching.
The course aims at enabling students to revise, consolidate and extend their command of English
grammar and vocabulary.
Teaching methodology in a Language Lab
· Teaching with one to one and one to many control with the teacher. This facility may be
utilised for teaching topics like Grammar, Writing Skills, Vocabulary, Phonetics etc.
· Broadcasting facility could be utilised for conducting both reading and listening
comprehension
· One to one as well as one to many conversation facility in the software may be utilised for
making corrections, remedial teaching and discussions with students
· Conference grouping could be used for conducting GDs
· Word chatting
· Pairing discussion may be used for conducting various activities to improve
communication skills
· Students demonstration
· Class tests
· Student monitoring by teacher
· Audio recording
· Audio on demand (by students)
· Video on demand (by students)
· Material upload ( by teacher for upgradation of teaching material)
17
(4 !Vocabulary
1.Vocabulary building: expressions used in day to day situations, word & phrases useful in a professional context,
business expressions, abbreviations, telephone language, business idioms, polite requests, register, British and
American English
2 : (6 Hrs)
Phonetics
Consonants, vowels, word stress, elementary intonation, Pronunciation practice, General
phonetics exercises in language laboratory.
3 : (6 Hrs)
Grammer
Functional Grammer, the tense: structure and use, formation of correct sentences in various
situations, common mistakes and how to avoid them, auxiliary verbs and various ways in which
each can be used, Reported speech and its use in spoken communication
4 : (4 Hrs)
Reading & Listening Skills
Reading Comprehension, Listening Comprehension and Discussions based on Listening sessions
in groups of 10. Comprehension with various purposes such as finding precise information,
interpretation of the information, understanding the gist
5 : (4 Hrs)
Writing Skills
Business Correspondence: Business Letters, Covering Letters, Minutes of meeting, E-mail
Etiquettes, Resume. Technical Writing: Introduction to Technical Writing (Manuals, brochures
etc.) Technical Reports
6 : (4 Hrs)
Communication Skills
Formality and politeness, Body Language, Communication barriers, Planning, preparation,
delivery and assessment of activities like: Public Speaking, Presentation Skills, Group Discussion,
Interview Skills, Extempore, Expressing agreement or disagreement politely, Telephone etiquettes,
Practice in language laboratory,PPT
7.
MEETING
Purpose,Procedure,Chairmanship,participation.minutes of meetind ,Physical arrangements
8. Group Discussion
Group Dynamics ,Purpose, Organization, Group discussion for any 4 technical/non technical
topics.
9.Audio Visual aids
Basic Principles and guidelines, types of aids and use, Development of Power Point presentation
on any technical or non technical topic with animation, Sound , video etc
10 Effective Stress Management
Sources of stress, Recognizing stress ,Managing emotional and physical stress
18
Term work
Term work shall consist shall consist of Journal/Reports/Presentations assigned by teacher and
home assignements. A minimum of 10 assignments must be completed covering all topics. On
topics 1 to 4 must be in a language lab. Group discussions oral presentation must be in batches.It is
in the best interest o Institute that students develop the skills and senior Faculty Guest faculty be
involved
Reference Books
1.Krishna Mohan and Banerji Meera: Developing Communication Skills
Macmillan India
2.Rutherford A.J. :Communication Skills for Technical Communiaction. Pearson
Education
19
Semester - II
Information Technology
2008 Course
20
207003 - ENGINEERING MATHEMATICS - III
Teaching Scheme Examination scheme
Lectures: 4 hrs / week Theory: 100 Marks
SECTION I
Unit I: Linear Differential Equations (LDE) (09 Hours)
Solution of nth order LDE with Constant Coefficients, Method of Variation of Parameters, Cauchy's & Legendre's DE,
Solution of Simultaneous & Symmetric Simultaneous DE, Modeling of Electrical Circuits.
Unit II: Complex Variables (09 Hours)
Functions of Complex Variables, Analytic Functions, C-R Equations, Conformal Mapping, Bilinear Transformation,
Cauchy's Theorem, Cauchy's Integral Formula, Laurent's Series, Residue Theorem
Unit III: Transforms (09 Hours)
Fourier Transform (FT): Complex Exponential Form of Fourier Series, Fourier Integral Theorem, Sine & Cosine
Integrals, Fourier Transform, Fourier Sine and Cosine Transform and their Inverses, Application to Wave Equation.
Introductory Z-Transform (ZT): Definition, Standard Properties, ZT of Standard Sequences and their Inverses.
Solution of Simple Difference Equations.
SECTION II
Unit IV: Statistics and Probability (09 Hours)
Measures of Central Tendency, Standard Deviation, Coefficient of Variation, Moments, Skewness and Kurtosis,
Correlation and Regression, Reliability of Regression Estimates
Theorems and Properties of Probability, Probability Density Function, Probability Distributions: Binomial, Poisson,
Normal and Hypergometric; Test of Hypothesis: Chi-Square test.
Unit V: Vector Differential Calculus (09 Hours)
Physical Interpretation of Vector Differentiation, Vector Differential Operator, Gradient, Divergence and Curl,
Directional Derivative, Solenoidal, Irrotational and Conservative Fields, Scalar Potential, Vector Identities.
Unit VI: Vector Integral Calculus (09 Hours)
Line, Surface and Volume integrals, Work-done, Green's Lemma, Gauss's Divergence Theorem, Stoke's Theorem,
Applications to Problems in Electro-Magnetic Fields.
Text Books:
1. Advanced Engineering Mathematics by Peter V. O'Neil (Cengage Learning).
2. Advanced Engineering Mathematics by Erwin Kreyszig (Wiley Eastern Ltd.).
Reference Books:
1. Engineering Mathematics by B.V. Raman (Tata McGraw-Hill).
2. Advanced Engineering Mathematics, 2e, by M. D. Greenberg (Pearson Education).
3. Advanced Engineering Mathematics, Wylie C.R. & Barrett L.C. (McGraw-Hill, Inc.)
4. Higher Engineering Mathematics by B. S. Grewal (Khanna Publication, Delhi).
5. Applied Mathematics (Volumes I and II) by P. N. Wartikar & J. N. Wartikar
(Pune Vidyarthi Griha Prakashan, Pune).
6. Advanced Engineering Mathematics with MATLAB, 2e, by Thomas L. Harman, James Dabney and Norman
Richert (Brooks/Cole, Thomson Learning).
21
214446 - COMPUTER GRAPHICS
Teaching Scheme Examination scheme
Lectures: 3 hrs / week Theory: 100 Marks
Pre-requisites
1. Computer Programming and basic data structures
2. Mathematics topics such as analytical geometry, trigonometry, linear algebra and matrices.
3. Knowledge of vector space, Matrices, Dot products and distances
Learning Objectives
1. Understand the foundations of computer graphics: hardware systems, math basis, light and
color.
2. Come to appreciate the complexities of modeling realistic objects through modeling
complex scenes using a high-level scene description language.
3. Become acquainted with some advanced topics in computer graphics.
4. The student should gain an expanded vocabulary for discussing issues relevant to computer
graphics (including both the underlying mathematics and the actual programming).
5. The student should gain an appreciation and understanding of the hardware and software
utilized in constructing computer graphics applications.
6. The student should gain a comprehension of windows, clipping and view-ports in relation
to images displayed on screen.
7. The student should gain an understanding of geometric, mathematical and algorithmic
concepts necessary for programming computer graphics.
Teaching aid
Faculties should use LCD to demonstrate the concept of Graphics.
Introduction
Unit I : (6 Hrs)
Basic Concepts
Graphics Primitives: Introduction to computer graphics, Basics of Graphics systems, Raster scan
& random scan displays, display processor, display file structure, algorithms and display file
interpreter.
Display devices, Interactive devices: Tablets, touch panels, mouse, joysticks, track balls, light pen
etc., Data generating devices: Scanners and digitizers, primitive operations, display file structure,
algorithms and display file interpreter, Text and line styles.
Scan conversions, lines, line segments, vectors, pixels and frame buffers, vector generation, DDA
and Bresenham's line and circle drawing algorithms*, initialising, thick lines, character generation:
Stroke Principle, Starburst Principle, Bit map method, display of frame buffer.
(* Scan conversion algorithms should be given mathematical treatment)
22
Unit II : (8 Hrs)
2D & 3D Transformations
2D Geometric Transformations, Basic transformations- translation, scaling, rotation, other
transformations such as reflection, shearing, matrix representation and homogeneous coordinate
system, Composite transformation, 3D transformation Polygon filling methods
Unit III : (8 Hrs)
3D Viewing & 3D object representation
Projections, Specifying an arbitrary 3D View, Examples of 3D viewing .Polygon surfaces,
polygon tables, plane equation, polygon meshes, curved lines & surfaces, quadric surfaces, Spline
representation.
Unit IV : (5 Hrs)
Color models & animation
Colors spaces : RGB, HSV, CMY(K), YIQ, Color Mixing.
Computer Animation : Animation sequences ,functions & Languages, Key-frame systems, Motion
Specifications.
Unit V : (6 Hrs)
Ray Tracing
Ray tracing methods, algorithms, ray surface intersection calculations. Transformation,
Hierarchy, Local Illumination and shading.
Unit VI : (5 Hrs)
Advanced Topics
Rendering equation and Monte Carlo methods, anti-aliasing, texture mapping, shadows,
GPU, Bezier curves, Fractals, fractal lines and surfaces(With complete mathematical treatment of
this unit)
Interactive Graphics & usage of at least two tools of computer graphics (3D studio,
Maya, Similar tools) ( Usage of tools in Lab )
Text Books
1. Computer Graphics A Programming approach by Steven Harrington, Tata McGraw Hill.
2. Computer Graphics by M Paulin Baker, Pearson Education.
Reference Books
1. Procedural Elements for Computer Graphics by Davis Rogers, Tata McGraw Hill
2. Computer Graphics : Principles and Practice by Foley and Van Dam, Pearson Education
3. Computer Graphics Using Open GL by F.S. Hill, JR. Pearson Education
Computer Graphics by Amarendra N Sinha, Arun D Udai, Tata McGraw Hill
23
214447 - PROCESSOR ARCHITECTURE AND INTERFACING
Teaching Scheme Examination scheme
Lectures : 3 hrs / week Theory : 100 Marks
Prerequisites : Computer Organization
Learning Objectives
1. To learn the architecture and assembly language programming of 80386 Microprocessor.
2. To provide insight to DOS and BIOS and their functions.
3. To study architecture and programming 8051 micro-controllers
Unit I : (8 Hrs)
Introduction to 80X86 Processors
16/32bit processor 80x86, 80386 Features and Architecture, Pin Description, Functional
Description, Register Set , 80386 Real mode, Segmentation
Bus Cycles Initialization and configuration, Bus operations , Address pipelined ,
Memory organization and I/O organization, 16/32 bit transfer.
Unit II : (8 Hrs)
Assembly Language Programming
Introduction to assembly language programming, Instruction set, Assembler, linker, loader,
concepts, Assembler directives, file I/O processing, Far and near procedures, macros, Timing and
delay loops, DOS internal, DOS calls, .EXE, .COM files, Interfacing with 8086: Programmable
parallel ports, 8255 A PPI, interfacing, keyboard & display, parallel printer interface, interfacing
RAM.
Unit III : (6 Hrs)
Protected Mode
Segmentation- support registers, related instructions descriptors, memory management
through segmentation, logical to linear/physical address translation, protection in segmentation,
Privilege instructions,
Paging - support registers, descriptors, linear to physical address translation, TLB, page
level protection, virtual memory, .entering into PM mode and returning back to RM mode
Unit IV : (6 Hrs)
Multitasking, Interrupts, Exceptions and I/O
Inter-privilege level transfer using Call gates and confirming code segment ,
Multitasking - Support registers, related descriptors, Task switching, I/O permission bit map.
Virtual Mode - features, address generation, privilege level, instructions and registers available,
entering and leaving V86 mode.
Interrupt structure - Real, Protected and Virtual 8086 modes, Comparison of all three
modes
24
Unit V : (6 Hrs)
Microcontroller
Microcontroller 8051 Architecture, On-Chip data memory and program memory
organization - Register set, Register bank, SFRs, External data memory and program memory,
Interrupts structure and Response.
Unit VI : (6 Hrs)
Microcontroller
Timers and their programming, Serial port and programming, Other features, Design of
minimum system using 8051 micro-controller for various applications. Features of PIC 16C, PIC
16F8XX ,Texas MSP 430.
Text Books
1. Turley, "Advanced Programming of 80386 "
2. Douglas V Hall.," Microprocessors and Interfacing"
3. Ayala ,"The 8051 Micro Controller 3rd Edition", IE
Reference Books
1. Tribel Singh 8088 /8086 Processor PHI
2. Mazidi M.Gillipse J. "The 8051 Microcontroller and Embedded Systems", Pearson
education,2002,ISBN-81-7808-574-7
3. Intel 8 bit Microcontroller manual
4. Deshmukh A., "Microcontrollers - Theory and Applications", Tata McGraw-Hill, 2004,
ISBN 0-07-058595-4
25
214448 - DATA STRUCTURES AND FILES
Teaching Scheme Examination scheme
Lectures: 3 hrs / week Theory: 100 Marks
Learning objectives
The students should be capable of applying appropriate data structures for any given application.
Unit I : (8 Hrs)
File organization
C Files and command line argument, Primitive operations and implementation in C,
Concept of sequential, simple Index file and direct access file , Hashing, Hashing function and it's
characteristics, Concept of collision resolution, linear probing, chaining with & without
replacement, rehashing, Processing of sequential, Index-sequential and direct files.
Sequential file organisation, direct file organisation, index sequential file organisation and their
implementation.
Unit II : (6 Hrs)
Stack
Concept of stack as ADT, Implementation of stacks using linked and sequential
organization. Concept of multistacks, Importance of stack in recurssion, Importance of implict and
explict stack Application of stacks.
Unit III : (6 Hrs)
Queues
Concept of queues as ADT, Implementation of linear and circular queue using linked and
sequential organization. Concept of multiqueues, dequeue and priority queue. Application of
queues.
Unit IV : (6 Hrs)
Tree
Difference in linear and non-linear data structure, Trees and binary trees-concept and
terminology.binary tree as an ADT. Algorithm for tree traversals (recursive and non recursive).
Conversion of general tree to binary tree. Binary search trees, Concept of threaded binary
tree.Threaded binary tree as an ADT. Preorder, Inorder traversals of inorder threaded binary search
tree
Unit V : (6 Hrs)
Graphs
Graph as an ADT, Representation of graphs using adjacentcy matrix, adjacentcy list, Depth
First Search and Breadth First Search. Algorithms for minimal spanning tree (Prim's and
Kruskal's )and shortest path- Dijkstra's algorithm Application of these algorithms
Unit VI : (6 Hrs)
Symbol Tables and Dynamic Trees
Notion of Symbol Table, AVL Trees, OBST, Heap data strucutre its application in heap
sort, Huffman's algorithm,
26
Hash Tables: Basic concepts, hash function, hashing methods, collision resolution, bucket
hashing.
Text Books
1. R. Gilberg, B. Forouzan, "Data Structures: A pseudo code approach with C", Cengage
Learning, ISBN 9788131503140.
2. A. Michael Berman, "Data structures via C++", Oxford University Press, 2002, ISBN-0-
19-510843-4.
Reference Books
1. E. Horowitz, S. Sahni, D. Mehta "Fundamentals of Data Structures in C++", Galgotia Book
Source, New Delhi, 1995, ISBN 16782928.
2. Y. Langsam, M. Augenstin and A. Tannenbaum, "Data Structures using C and C++", 2nd
Edition, Prentice Hall of India, 2002, ISBN-81-203-1177-9.
3. R. Gilberg, B. Forouzan, "Data Structures: A pseudo code approach with C++", Cengage
Learning, ISBN 9788131504925.
4. A. Tharp ,"File organisation and processing",2008 ,Willey India edition ,9788126518685
5. A. Drozdek, "Data Structures in C++", 2nd Edition, Thomson Brookes /COLE Books, 2002,
ISBN 981 - 240 - 079 - 6.
6. J. Tremblay, P. Soresan, "An introduction to data structures with Applications", 2nd edition,
Tata McGraw-Hill International Editions, 1984, ISBN-0-07-462471-7.
7. M. Folk, B. Zoellick, G. Riccardi, "File Structure An Object oriented approach with C++",
Pearson Education, 2002, ISBN 81 - 7808 - 131 - 8.
8. M. Weiss, "Data Structures and Algorithm Analysis in C++", 2nd edition, Pearson Education,
2002, ISBN-81-7808-670-0
27
214449 - DATA COMMUNICATION
Teaching Scheme Examination scheme
Lectures: 3 hrs / week Theory: 100 Marks
Learning Objectives
1. Fundamentals of data communications
2. Basic Network configurations
3. Understanding the differences between data communications and telecommunications
4. Practical examples of networks such as
· Fundamentals of communications media
· Hardware configurations within networks
· Data transmissions
Unit I : (8 Hrs)
Layer Models and Signals
Layered Tasks : Sender, Receiver, And Carrier, Hierarchy
The OSI Model : Layered Architecture, peer-to-peer Processes, Encapsulation Layers In The OSI
Model
TCP/IP Protocol Suite
Addressing : Physical &logical Addresses, Port Addresses, Specific Addresses
Analog And Digital : Analog And Digital Data, Analog And Digital Signals, Periodic And Nonperiodic
Signal
Periodic Analog Signals: Sine Wave, Phase, Wavelength, Time And Frequency Domains,
Composite Signals Bandwidth
Digital Signals : Bit Rate ,bit Length, Digital Signal As A Composite Analog Signal, Transmission
Of Digital Signals
Transmission Impairment: Attenuation, Distortion, Noise
Data Rate Limits: Noiseless Channel: Nyquist Bit Rate, Noisy Channel: Shannon Capacity, Using
Both Limits
Performance : Bandwidth, Throughput, Latency (delay), Bandwidth-delay Product, Jitter
Digital-to-digital Conversion: Line Coding, Line Coding Schemes, Block Coding, Scrambling
Analog to digital Conversion: Pulse Code Modulation (PCM), Delta Modulation (dm)
transmission modes: parallel transmission, serial transmission
Unit II : (6 Hrs)
Modulation And Multiplexing
Digital-to-analog Conversion: Aspects Of Digital-to-Analog Conversion, Amplitude Shift
Keying, Frequency Shift Keying, Phase Shift Keying, Quadrature Amplitude Modulation
Analog-to-analog Conversion: Amplitude Modulation, Frequency Modulation, , Phase Modulation
Multiplexing; Frequency-Division Multiplexing, Wavelength-Division Multiplexing Synchronous
Time-Division Multiplexing, Statistical Time-Division Multiplexing
Spread Spectrum : Frequency Hopping Spread Spectrum (FHSS), Direct Sequence Spread
Spectrum
28
Unit III : (6 Hrs)
Transmission Media And Switching
Guided Media : Twisted-Pair , Coaxial and Fiber-Optic Cable
Unguided Media : Wireless, Radio Waves, Microwaves, Infrared
Circuit-switched Networks : Three Phases, Efficiency, Delay, Circuit-Switched Technology in
Telephone Networks
Datagram networks: Routing Table , Efficiency, Delay, Datagram Networks in the Internet
Virtual-circuit networks: Addressing, Three Phases, Efficiency, Delay in Virtual-Circuit Networks,
Circuit-Switched Technology in WANs
Structure of a switch: Structure of Circuit Switches, Structure of Packet Switches
Digital Subscriber Line: ADSL, ADSL Lite, HDSL, SDSL, VDSL.
Unit IV : (6 Hrs)
Error Control And Data Link Control
Ttypes of errors : Redundancy, detection versus correction, forward error correction versus
retransmission, coding , modular arithmetic
Block coding: error detection, error correction , hamming distance, minimum hamming distance
Linear block codes : minimum distance for linear block codes, some linear block codes
Cyclic codes : cyclic redundancy check ,hardware implementation ,polynomials, cyclic code
analysis, advantages of cyclic codes
Checksum : idea, , one's complement, internet checksum Framing : fixed-size framing, variablesize
framing
flow and error control: flow control, error control
protocols
Noiseless channels: simplest protocol, stop-and-wait protocol
Noisy channels: stop-and-wait automatic repeat request, go-back-n automatic repeat request ,
selective repeat automatic repeat request, piggybacking
HDLC: configurations and transfer modes, frames, control field
Point-to-point Protocol: Framing, Transition Phases, Multiplexing, Multilink PPP.
Unit V : (6 Hrs)
Multiple Access and Ethernet
Random access : Aloha, Carrier Sense Multiple Access (CSMA), Carrier Sense Multiple
Access With Collision Detection (CSMALCD), Carrier Sense Multiple Access With Collision
Avoidance (CSMALCA)
Controlled access; reservation, polling, token passing
Channelization : Frequency Division Multiple Access (FDMA), Time-Division Multiple Access
(TDMA), Code Division Multiple Access (CDMA)
ETHERNET :IEEE standards, data link layer, physical layer
Standard Ethernet : MAC Sub-layer, Physical Layer
bridged Ethernet, switched Ethernet, full-duplex Ethernet
Fast Ethernet: MAC Sub-layer, Physical Layer
Gigabit Ethernet : MAC sub-layer, Physical Layer, Ten-gigabit Ethernet
29
Unit VI : (6 Hrs)
Devices, Backbone networks and SONET
Connecting devices: passive hubs, repeaters, active hubs, bridges, two-layer switches
routers, three-layer switches, gateway
Backbone networks: bus backbone, star backbone.
Virtual LANs: membership, configuration, communication between switches, IEEE standard ,
advantages
SONET Architecture : signals, Sonet devices, connections.
Sonet layers: path layer, line layer , section layer, photonic layer, device-layer relationships, Sonet
frames : frame, byte, and bit transmission, STS-L frame format, overheads, encapsulation
Text Books
1. Behrouz a Forouzan, Data Communications and Networking, 4th Edition
2. P. C. Gupta - Data Communications PHI
Reference Books
1. William Stallings - Data & Computer Communications - 7th Edition: PHI Publications
2. Leon - Garcia, Indra Widijaja - Communication Networks Fundamental Concepts and Key
Architectures
3. Achyut Godbole - Data Communication Networks - TMGH
30
214450 PROCESSOR INTERFACING LABORATORY
Teaching Scheme Examination scheme
Practical: 4 hrs / week Term Work: 25 Marks
Oral: 50 Marks
1. Write Assembly language program (ALP) to add array of N numbers stored in the memory.
2. Write ALP to perform non-overlapped and overlapped block transfer.
3. Write ALP to convert 4-digit Hex number into its equivalent BCD number and 5-digit
BCD number into its equivalent HEX number. Make your program user friendly to accept
the choice from user for
i. HEX to BCD ii. BCD to HEX 3) EXIT.
Display proper strings to prompt the user while accepting the input and displaying the
result.
4. Write ALP to perform string manipulation to calculate string length and reverse a string.
The strings to be accepted from the user is to be stored in code segment Module_1 and
write FAR PROCEDURES in code segment Module_2 for following operations on the
string:
i. Concatenation of two strings
ii. Compare two strings
iii. Number of occurrences of a sub-string in the given string
iv. Find number of words, characters, number of lines and number of capital
letters from the given text in the data segment
Note: Use PUBLIC and EXTERN directive. Create .OBJ files of both the modules and link
them to create an EXE file.
5 (a) Write 8086 ALP to convert an analog signal in the range of 0V to 5V to its
corresponding digital signal using successive approximation ADC and dual slope ADC.
Find resolution used in both the ADC's and compare the results.
(b) Write 8086 ALP to interface DAC and generate following waveforms on oscilloscope,
(i) Square wave - Variable Duty Cycle and
frequency.
(ii) Ramp wave - Variable direction, (iii) Trapezoidal wave (iv) Stair case wave
(c) Write 8086 ALP to rotate a stepper motor for given number of steps at a given angle
and in the given direction of rotation based on the user choice
6 Write following programs in C using int86, int86x, intdos, intdosx functions
i. To delete a file
ii. To create a directory
Read and display disk information such as Drive, tracks, sectors etc
31
7 .Write 8086 ALP to perform Encryption and Decryption of a text message.
Program should open, say, FILE1, read the content of FILE1 and encrypt it using suitable
encryption key. Store encrypted text along with encryption key in, say, FILE2. Read and
display the contents of encrypted file i.e. FILE2. Decrypt the data and store the decrypted
data in, say, FILE3. Compare the contents of FILE1 and FILE3 after decryption. Make
your program user friendly with proper screen echoes.
8 Write 8086 ALP to read command line arguments using PSP(Program Segment Prefix) and
implement "DOS COPY Command ". Use File Handle function for handling the files.
Handle all the errors and display appropriate message if user does not enter proper
command line argument.
9 Write ALP to switch from real mode to protected mode and back to real mode. Display an
appropriate message in each mode.
10 Write ALP to read Boot Sector and Display contents of Boot Sector.(use Inline C Code)
11 Assignments based on programming 8051 microcontroller using 8051 hardware or kits to
cover following topics:
a. Bit addressable area, Register banks, External data memory, External program,
Memory (MOVX, MOVC etc) Select any one of the given assignment.
i. Write a program to add n, 8 bits numbers found in internal ram location 40H
onwards and store results in R6 and R7.
ii. Write a program to multiply 16 bit number by 8 bit number and store the
result and internal memory location.
b. Write a program for block transfer for internal / external memory.
12 Timer programming :ISR based
Write ALP to generate 2KHz square wave using Timer interrupt on any port pin.
13 Serial port programming : ISR based
Connect two 8051 Ics using serial ports Send FFh and 00H alternatively to receiver .Output
received byte to port1 ,see port1 pin waveform on CRO.
Write ALP to establish communication between two 8251 in asynchronous and
synchronous mode.
14 Write ALP to interface 8051 with :
Select any two of the given assignment.
i. Interfacing DAC and writing programs to generate triangular, trapezoidal and sine
waveforms.
ii. Interfacing 8/12 bit ADC to 8051 or equivalent and to write a program to find out
the average value for 10 readings.
iii. Interface stepper motor to 8051 and write a program to rotate motor with different
step angles and with different speeds.
Student should submit term work in the form of a journal based on the above assignments.
Oral examination will be based on the term work. Questions will be asked during the
examination to judge the understanding of the practicals performed during the term.
Candidate is expected to know the theory involved in the experiment.
32
214451 - DATA STRUCTURES AND FILES LIBORATORY
Teaching Scheme Examination scheme
Practical: 4 hrs / week Termwork : 25 Marks
Practical : 50 Marks
1. Implement all primitive operations on Sequential file in C
2. Implementation of Hash table using array and handle collisions using Linear probing with
replacement and Chaining without replacement
3. Represent single variable polynomial as a circular linked list. Accept the terms in the
polynomial in any order, i.e. not necessarily in the decreasing order of exponent. Sort while
creating polynomial in the decreasing order of exponent and write a menu driven program
to perform display, addition, multiplication and evaluation.
4. Implement stack as an abstract data type (ADT) using linked list. Use this ADT for a) infix
to prefix conversion, b) infix to postfix conversion, c) evaluation of postfix expression.
5. Consider a scenario for Hospital to cater services to different kinds of patients as
a) Serious (top priority), b) non-serious (medium priority), c) General Checkup (Least
priority). Implement the priority queue to cater services to the patients.
6. Accept a postfix expression and construct an expression tree and perform recursive and
non recursive traversals.
7. Create a binary search tree of mnemonics from assembly language(e.g. add, mult, div, sub
etc.) and perform following operations:
a) Insert, b) delete, c) depth of the tree, d) search a node, e) Find its mirror image f)
Print original g) mirror image level wise.
8. Represent a given graph using adjacency list and perform DFS and BFS Use the map of the
area around the college as the graph. Identify the prominent land marks as nodes and
perform DFS and BFS on that
9. Represent a given graph using adjacency matrix and find the shortest path using
Dijkstra's algorithm. Use the map of the area around the college as the graph. Identify the
prominent land marks as nodes and find minimum distance to various land marks from the
college as the source.
10. Implement Huffman's algorithm.
33
References:
Code complete: STEVE McCONNEL
Note: While performing the assignments following care should be taken
1. Proper indenting, coding styles, commenting, naming conventions should be followed.
2. Avoid using global variables as far as possible
3. Use of functions is necessary
4. Faculty should prepare a lab manual including standard test cases & should be available
for reference to students.
Student should submit term work in the form of a journal based on the above assignments.
Practical examination will be based on the term work. Questions will be asked during the
examination to judge the understanding of the practical performed at the time of examination.
Candidate is expected to know the theory involved in the experiment.
34
210253: OBJECT ORIENTED PROGRAMMING AND COMPUTER GRAPHICS
LABORATORY
Teaching Scheme Examination scheme
Lectures : 1 Hrs / Week Practical : 50 Marks
Practical : 4 hrs / week Term Work : 50 Marks
Unit I : (3 Hrs)
Introduction to Object Oriented Programming
Introduction to procedural, modular, object-oriented and generic programming techniques,
Limitations of procedural programming, Need of object-oriented programming, fundamentals of
object-oriented programming: objects, classes, data members, methods, messages, data
encapsulation, data abstraction and information hiding, inheritance, polymorphism.
Unit II : (2 Hrs)
Programming with C++
++: Extensions to C: Variable declarations, global scope, 'const', reference variables,
comments, default parameters, function prototypes, function overloading, inline functions, default
and constant arguments, 'cin', 'cout', formatting and I/O manipulators, new and delete operators
Unit III : (4 Hrs)
Classes and Objects:
Defining a class, data members and methods, public, private and protected members, inline
member functions, static data members, static member functions, 'this' pointer, constructors,
destructors, friend function, dynamic memory allocation, array of objects, pointers and classes,
class as ADTs and code reuse
Unit IV : (3 Hrs)
Operator Overloading:
Introduction, Need of operator overloading, overloading the assignment, binary and unary
operators, overloading using friends, rules for operator overloading, type conversions
Unit V : (4 Hrs)
Inheritance and Polymorphism
Concept and need, single inheritance, base and derived classes, friend classes, types of
inheritance, hybrid inheritance, member access control, static class, multiple inheritance,
ambiguity, virtual base class, polymorphism, virtual functions, pure virtual functions, abstract base
class, virtual destructors, early and late binding, container classes
Unit VI : (5 Hrs)
Templa
Was this article useful?

Post your Comment